1. Technical Field
The present invention relates to a manufacturing method for semiconductor chips for forming semiconductor devices arranged in a plurality of device-formation-regions defined by dividing regions on a first surface of a semiconductor wafer and individually separating the device-formation-regions of the semiconductor wafer along the dividing regions, thereby manufacturing semiconductor chips that include the individualized semiconductor devices and to a semiconductor chip.
2. Description of the Related Art
Conventionally, as a method for dividing a semiconductor wafer into individual semiconductor chips by such a manufacturing method for semiconductor chips, various methods have been known. For example, a method for dividing a semiconductor wafer by mechanically cutting the wafer by means of a rotary blade called the dicer blade, i.e., mechanical dicing is known.
However, semiconductor wafers have recently been made thinner and thinner, and a semiconductor wafer susceptible to external forces is subjected to the mechanical dicing described above, it is often the case where the semiconductor wafer is damaged at the time of cutting. This leads to a problem that a reduction in the processing yield cannot be avoided. As such damage, there is, for example, the occurrence of chipping that the corner portions (edges) of the semiconductor chips become chipped due to the sharply cut shape.
In recent years, plasma dicing that uses plasma etching has been attracting attention in place of the conventional mechanical dicing described above (reference should be made to, for example, Japanese unexamined patent publication No. 2004-172365 A). A method for dividing a semiconductor wafer into individual semiconductor chips by the conventional plasma dicing is described herein with reference to the schematic explanatory views shown in FIGS. 28A through 28C and FIGS. 29A and 29B.
First of all, as shown in FIG. 28A, a semiconductor wafer 501 is put into a state in which semiconductor devices 502 are formed in the respective device-formation-regions R1 defined by dividing regions R2 on its circuit-formation-face 501a. Each of the semiconductor devices 502 includes devices such as a MOS (Metal-Oxide-Semiconductor) structure transistor constructed of a semiconductor wafer 501 (Semiconductor), a silicon oxide 551 (Oxide) formed directly on the circuit-formation-face 501a and a metal film (Metal) formed on the silicon oxide 551. Further, the semiconductor device 502 further includes connection terminals 552 (also called the bonding pads) for electrically connecting the devices to external electronic apparatuses. Moreover, a surface protection film 553 is formed on the surfaces of the semiconductor devices 502, so that the surfaces of the semiconductor devices 502 are protected. The connection terminals 552 are exposed outside without being covered with the surface protection film 553. Neither the silicon oxide 551 nor the surface protection film 553 is formed in portions that correspond to the dividing regions R2 of the circuit-formation-face 501a. 
Next, as shown in FIG. 28B, a protective sheet 504 is peelably adhesively stuck to the circuit-formation-face 501a via an adhesive so that the circuit-formation-face 501a of the semiconductor wafer 501 does not suffer damages. Subsequently, a mask (mask pattern) 505 is placed on a surface 501b to be processed, or the surface opposite from the circuit-formation-face 501a so that the portions that correspond to the dividing regions R2 are exposed.
Next, by performing plasma etching on the semiconductor wafer 501 on which the mask 505 is thus formed, the exposed surface of the surface 501b that is not covered with the mask 505 is etched, removing the portions that correspond to the dividing regions R2. Through this process, as shown in FIG. 28C, the device-formation-regions R1 are individually separated, forming the individual pieces of the semiconductor chips 510 that include the semiconductor devices 502. Consequently, the semiconductor wafer 501 is divided into the individual pieces of the semiconductor chips 510 that include the respective semiconductor devices 502 along the dividing regions R2.
Subsequently, as shown in FIG. 29A, the mask 505 that is remaining on the surface 501b to be processed of the separated semiconductor chips 510 is removed by carrying out, for example, an ashing process. Subsequently, as shown in FIG. 29B, an adhesive sheet (dicing sheet) 506 is stuck to the surface 501b to be processed of the semiconductor wafer 501, and the protective sheet 504 that has protected the circuit-formation-face 501a of the semiconductor wafer 501 is peeled off. As a result, the semiconductor chips 510 are arranged on the adhesive sheet 506 in a state in which they are separated into individual pieces.
By dividing the semiconductor wafer 501 using the conventional plasma dicing described above, damages given to the manufactured semiconductor chips 510 can be reduced in comparison with the aforementioned mechanical dicing.